Intern, AI Application Engineer

Folsom, California, United States

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Advancing the World’s Technology Together

Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.

The SoC Architect team proposes multiple SoC level architecture candidates for emerging memory/storage solution and demonstrates that the proposed architecture is viable through hands-on RTL implementation.

This role offers the opportunity to shape next-generation SoC and subsystem architectures while staying deeply hands-on in RTL design, FPGA integration, and validation. It is ideal for engineers who want to turn advanced memory and storage concepts into real hardware and drive them all the way to silicon.

Location: Daily onsite presence at our San Jose, CA headquarters in alignment with our Flexible Work policy

Reports to: Senior Director

* Deploy and operate an LLM inference service (vLLM serving Llama-3.3-70B) on a 4 × NVIDIA H200 GPU server, working closely with your mentor and the storage architecture team. * Build an automated benchmark harness that replays long-context, multi-turn and agent-style request traces and records latency and throughput (TTFT, TPOT, goodput). * Configure KV cache offloading (LMCache, NVIDIA Dynamo/NIXL) to network-attached storage over NVMe-oF and RDMA, first on a BlueField-3 storage server and then on our network-attached SSD prototype. * Run daily experiment sweeps across request rates, context lengths and cache sizes, keeping every configuration and result reproducible in git. * Analyze results with Python to find bottlenecks across the GPU, network and SSD, and share findings in weekly team meetings. * Collaborate with FPGA, SoC and firmware engineers to debug the end-to-end data path and validate KV cache correctness. * Summarize the measured storage requirements (bandwidth, IOPS, latency) that shape the architecture of future SSD controllers, and present them to the team at the end of the internship.