Engineer, DEG Mobile DRAM Verification

Hyderabad, Telangana, India

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Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Senior Verification Engineer with 4-8 years of Experience

Unique Opportunities

* Complete ownership of verification and end to end analysis of sophisticated full chip gate level custom designs with advanced low power and power management technologies spread across multiple categories such as DDR5, LPDDR5,DDR6 and LPDDR6 that can operate at high speeds of up to 9600MT/s. * Collaborate closely with design and verification team members spread across the globe, many of whom have decades of experience in memory design. * Work on multi-functional tasks that can widen your skills.

Company and benefits

* Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. * Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon full chip designs. * Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. * Participate in developing verification methodology and verification environments for sophisticated products. * Co-work with international colleagues on developing new verification flows to take on the challenges in design. * Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. * Ability to identify verification pain points suitable for AI-based automation and collaborate with cross‑functional teams to deploy scalable solutions.

* Good communication skills and ability to work well in a team * Exposure to gate level simulations ( with delays ) and Logic schematic analysis * Analytical capability for complex CMOS and/or gate level circuit designs * Proficient with Verilog simulations

* Experience in SystemVerilog, PLI coding * Experience in UVM Test Bench * Experience in DRAM, SRAM or other memory related fields * Experience in timings analysis Setup/Hold and critical data path timing analysis * Experience using AI-assisted tools to improve verification productivity, with a strong emphasis on correctness, validation, and responsible use of enterprise-approved AI systems

Bachelors or Post Graduate Degree in Electronics Engineering or related engineering field required