CPU Core Design Verification Manager
at Tenstorrent
Bengaluru, Karnataka, India, hybrid, senior, 15+ years
posted 08 Sept 2026
- Regressions
- Post-Silicon verification
- Emulation
- ISA
- RISC-V
- Coverage
- CVM
- RTL
- UVM
- Testbench development
- Debug
About the role
Posted: 2026-09-08
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.
At Tenstorrent, we build open, state of the art compute for real workloads and real developers.
You will lead our Bangalore-based CPU Core Design Verification team, driving both the technical strategy and the people leadership behind verification of our high-performance, out-of-order RISC-V CPUs. You will manage a team of core-level verification engineers, partner closely with our Santa Clara and Austin sites, and own delivery of core verification from architecture definition through tapeout readiness.
This role is hybrid based out of Bangalore, India, with regular collaboration across our globally distributed CPU organization.
We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
What they are looking for
- 15+ years of CPU/DV experience, including 7+ years leading verification teams, with strong hands-on expertise in high-performance, out-of-order CPU verification.
- Deep microarchitecture & verification expertise, including ISA, RTL, UVM/CVM, testbench development, regressions, coverage, and complex debug.
- Strong people and technical leadership, with experience hiring, mentoring, developing engineers, and setting verification strategy and methodology across teams.
- Highly collaborative and execution-focused, comfortable working across time zones and driving cross-functional debug with Design, DV, Emulation, and Post-Silicon teams, including P0 issues and AI-assisted verification workflows.
What We Need
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