Datacenter & Agentic AI Workload Performance Optimization Engineer

Posted: 2026-10-05

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

Tenstorrent is looking for a Workload Performance Optimization Engineer to help optimize the software workloads that run on our next-generation RISC-V platforms. You’ll work across modern datacenter and agentic AI workloads—including Java, Python, PHP, Node.js, Lua, Go, and Rust—to identify performance bottlenecks and develop software, compiler, runtime, and hardware-aware optimizations that improve throughput, latency, and efficiency. This role sits at the intersection of software runtimes, compilers, CPU microarchitecture, and RISC-V silicon. You’ll bring up and tune major runtimes, profile real-world applications, investigate memory and concurrency behavior, and explore optimizations using RISC-V Vector/Matrix capabilities and custom instructions. You’ll also work with AI-assisted development and automated optimization workflows to accelerate the performance engineering process. Your work will directly influence both the RISC-V software ecosystem and the architecture of future Tenstorrent CPUs.

This role is remote, based out of North America.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

- You’re a performance engineer who enjoys getting deep into runtimes, compilers, applications, and CPU microarchitecture to understand why software is fast—or slow.

- You have hands-on experience optimizing software on RISC-V or another modern CPU architecture, with a strong understanding of the hardware/software boundary.

- You’re comfortable profiling complex systems, finding bottlenecks, forming hypotheses, and iterating through optimizations using data.